The invention relates to integrated electronic circuits, and more particularly to fabricating devices having repeatable patterns.
Fabrication of integrated circuits requires precisely controlled sizing of areas to be doped, etched, or otherwise processed. Photolithographic techniques are often used for defining these areas. That is, a photoresist layer is first applied to a substrate, and then exposed through a mask. The mask contains clear and opaque features that define the pattern to be created in the photoresist layer. The areas in the photoresist that are exposed to light, or other radiation, are made either soluble or insoluble in a solvent known as a developer. When the exposed regions are soluble, a positive image of the mask is produced in the resist. When the nonexposed regions are soluble, a negative image results. After developing, the regions of the substrate no longer covered by the resist are removed by etching, thus replicating the mask pattern on the substrate.
In modern fabrication plants, wafers are formed from a number of identical dies, which each eventually become an integrated circuit. A xe2x80x9creticlexe2x80x9d is a glass emulsion or chrome plate having an enlarged image of a single die. The photolithographic equipment steps and repeats the reticle across the wafer, with each step exposing one integrated circuit.
Many of today""s integrated circuits have patterns that repeat, but whose repeating areas are too large to be contained on a single reticle. In other words, the size of the repeatable pattern exceeds the printable area of conventional lithographic equipment, so that the printing cannot be accomplished by stepping and repeating a single reticle. For example, a typical upper limit on reticle size is in the range of 22 millimeters square. Yet, for modern integrated circuits, it might be desired to have a repeatable pattern that exceeds this size.
Another problem with applying existing step and repeat processes is that many of today""s circuits are so functionally sophisticated that a single chip may contain several types of circuits, which differ as to repeatability as compared to the other circuitry on the chip. For example, a memory device might have control circuitry as well as a memory cell array, with an overall pattern that repeats on a larger scale than the size of a single reticle.
One approach to exposing pattern sizes that exceed the size of a reticle is to use a xe2x80x9ccomposition reticlexe2x80x9d. For example, a doubled pattern size can be accomplished if two reticles are used for the same layer, at two different times to step and repeat in alternating areas on the wafer surface. However, alignment of the two stepping processes is difficult and the processing time is increased.
A need exists for a fabrication process that facilitates photolithography for large and complex integrated circuits.
One aspect of the invention is a reticle for fabricating an integrated circuit on a wafer. As with conventional reticles, the reticle is formed by patterning opaque features on a transparent substrate. However, unlike conventional reticles, the reticle divides the circuit pattern into more than one mask. For example, the reticle might have one nonrepeating mask and one repeating mask. The nonrepeating mask is used once for exposing a first sub-pattern, while the repeating mask is blocked. Then, the nonrepeating mask is blocked and the repeating mask is used in a series of steps to expose a number of second sub-patterns.
A technical advantage of the invention is that alignment is a function of the accuracy of the step positioning capability of the lithographic equipment, without the added problem of aligning two different reticles. Typical lithographic step positioning is accurate within 0.02 to 0.03 micrometers, which is acceptable for today""s circuit tolerances.